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VND5004A-E VND5004ASP30-E
Double 4m high side driver with analog current sense for automotive applications
Features
Max transient supply voltage Operating voltage range Max On-State resistance (per ch.) Current limitation (typ) Off state supply current
1. Typical value with all loads connected
VCC VCC RON ILIMH IS
41V 4.5 to 27V 4 m
MultiPowerSO-30 PQFN - 12x12 Power lead-less
100A 2 A(1)
Application

General - Inrush current active management by power limitation - Very low stand-by current - 3.0V CMOS compatible input - Optimized electromagnetic emission - Very low electromagnetic susceptibility - In compliance with the 2002/95/EC European directive Diagnostic functions - Proportional load current sense - Current sense disable - Thermal shutdown indication Protection - Undervoltage shut-down - Overvoltage clamp - Load current limitation - Thermal shut down - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Reverse battery protection with self switch on of the PowerMOS (see Application schematic on page 18) - Electrostatic discharge protection Devices summary
Package Tube PQFN-12x12 Power lead-less MultiPowerSO-30 VND5004ASP30-E
All types of resistive, inductive and capacitive loads Suitable for power management applications
Description
The VND5004ATR-E and VND5004ASP30-E are devices made using STMicroelectronics VIPower technology. They are intended for driving resistive or inductive loads with one side connected to ground. Active VCC pin voltage clamp and load dump protection circuit protect the devices against transients on the Vcc pin (see ISO7637 transient compatibility table). These devices integrate an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is high impedance. Output current limitation protects the devices in overload condition. In case of long duration overload, the devicesa limit the dissipated power to a safe level up to thermal shut-down intervention. Thermal shut-down with automatic restart allows the device to recover normal operation as soon as a fault condition disappears.
Order codes Tape and Reel VND5004ATR-E VND5004ASP30TR-E Tray VND5004A-E -
Table 1.
December 2007
Rev 5
1/34
www.st.com 34
Contents
VND5004A-E / VND5004ASP30-E
Contents
1 2 Block diagram and pin configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 2.2 2.3 2.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1 3.2 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 19
4
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 4.2 MultiPowerSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 PQFN - 12x12 Power lead-less thermal data . . . . . . . . . . . . . . . . . . . . . . 23
5
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.1 5.2 5.3 5.4 5.5 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PQFN - 12x12 Power lead-less mechanical data . . . . . . . . . . . . . . . . . . . 28 MultiPowerSO-30 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PQFN - 12x12 Power lead-less packing information . . . . . . . . . . . . . . . . 31
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34
VND5004A-E / VND5004ASP30-E
List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and n.c. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V; Tj = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (8V3/34
List of figures
VND5004A-E / VND5004ASP30-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (not in scale) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 7. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 10. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 11. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 12. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 13. On state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 14. On state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 15. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 16. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 17. ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 18. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 19. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 20. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 21. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 22. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 23. Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 24. MultiPowerSO-30 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 25. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 20 Figure 26. MultiPowerSO-30 thermal impedance junction ambient single pulse (one channel ON) . . 21 Figure 27. Thermal fitting model of a double channel HSD in MultiPowerSO-30 . . . . . . . . . . . . . . . . 21 Figure 28. 12x12 Power lead-less package PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 23 Figure 30. PQFN - 12x12 Power lead-less package thermal impedance junction ambient single pulse (one channel ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Figure 31. Thermal fitting model of a double channel HSD in PQFN - 12x12 Power lead-less . . . . . 24 Figure 32. MultiPowerSO-30 outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 33. PQFN - 12x12 Power lead-less outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 34. MultiPowerSO-30 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 35. MultiPowerSO-30 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 36. PQFN - 12x12 Power lead-less tray shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 37. PQFN - 12x12 Power lead-less tape and reel shipment (suffix "TR"). . . . . . . . . . . . . . . . . 32
4/34
VND5004A-E / VND5004ASP30-E
Block diagram and pin configurations
1
Block diagram and pin configurations
Figure 1. Block diagram
VCC
VCC clamp GND Reverse battery protection
Under voltage
DRIVER
PwCLAMP OUTPUT1 ILIM Overtemp. PwrLIM IOUT1 CS_DIS K CURRENT SENSE1
INPUT1
LOGIC
DRIVER
PwCLAMP OUTPUT2 ILIM Overtemp. PwrLIM IOUT2 CS_DIS K CURRENT SENSE2
INPUT2
CS_DIS
Table 2.
Pin functions
Name VCC Battery connection Power output Ground connection Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state Function
OUTPUT1,2 GND INPUT1,2
CURRENT SENSE1,2 Analog current sense pin, delivers a current proportional to the load current CS_DIS Active high CMOS compatible pin, to disable the current sense pins
5/34
Block diagram and pin configurations Figure 2. Configuration diagram (not in scale)
VND5004A-E / VND5004ASP30-E
PQFN -12x12 Power lead - less (bottom view)
12 11 10 9 8 7 6 5 4 3 2 1
15
13
14 16
1 NC 2 NC 3 NC 4 GND 5 CS_DIS 6 CURRENT SENSE 2 7 CURRENT SENSE 1 8 INPUT 2 9 INPUT 1 10 NC 11 NC 12 NC 13 FOR TEST ONLY 14 VCC 15 OUTPUT 1 16 OUTPUT 2
VCC NC FOR TEST ONLY NC NC GND CS_DIS CURRENT SENSE 2 CURRENT SENSE 1 INPUT 2 INPUT 1 NC FOR TEST ONLY NC VCC
1
30
VCC Heat Slug1
15
16
VCC OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 2 MultiPowerSO-30 NC (top view) OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 1 VCC
Table 3.
Connection / Pin Floating To ground
Suggested connections for unused and n.c. pins
Current Sense N.R.(1) Through 1k resistor N.C. X X Output X N.R. Input X Through 10k resistor CS_DIS X Through 10k resistor For test only X N.R.
1. Not recommended.
6/34
VND5004A-E / VND5004ASP30-E
Electrical specifications
2
Electrical specifications
Figure 3. Current and voltage conventions
IS VCC VCC IOUT1,2 OUTPUT1,2 VOUT1,2 INPUT1,2 CURRENT SENSE1,2 VIN1,2 GND IGND ISENSE1,2 VSENSE1,2
ICSD IIN1,2
CS_DIS
VCSD
2.1
Absolute maximum ratings
Stressing the device above the ratings listed in the "Absolute maximum ratings" tables may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4.
Symbol VCC VCCPK -VCC IOUT - IOUT IIN ICSD DC supply voltage Transient supply voltage (T<400ms, Rload>0.5) Reverse DC supply voltage DC output current Reverse DC output current DC input current DC current sense disable input current
Absolute maximum ratings
Parameter Value 27 41 16 Internally limited 70 -1 to 10 -1 to 10 Vcc-41 +Vcc 342 2000 750 Unit V V V A A mA mA V V mJ V V
VCSENSE Current sense maximum voltage (Vcc>0V) EMAX VESD VESD Maximum switching energy (single pulse) (L=0.3mH; RL=0; Vbat=13.5V; Tjstart=150C; IOUT = IlimL(Typ.) ) Electrostatic discharge (Human Body Model: R=1.5k; C=100pF) Charge device model (CDM-AEC-Q100-011)
7/34
Electrical specifications Table 4.
Symbol Tj TSTG
VND5004A-E / VND5004ASP30-E
Absolute maximum ratings (continued)
Parameter Junction operating temperature Storage temperature Value -40 to 150 -55 to 150 Unit C C
2.2
Thermal data
Table 5.
Symbol
Thermal data
Value Parameter MultiPowerSO-30 12x12 PLLP 0.35 39(2) C/W C/W Thermal resistance junction-case (MAX) (with one channel ON) Thermal resistance junction-ambient (MAX) Unit
Rthj-case Rthj-amb
0.35 58(1)
1. PCB FR4 area 58mmX58mm , PCB thickness 2mm, Cu thickness 35 m, minimum pad layout. 2. PCB FR4 area 78mmX78mm , PCB thickness 2mm, Cu thickness 35 m, minimum pad layout.
8/34
VND5004A-E / VND5004ASP30-E
Electrical specifications
2.3
Electrical characteristics
Values specified in this section are for 8VSymbol VCC VUSD VUSDhyst
Power section
Parameter Operating supply voltage Undervoltage shutdown Undervoltage shut-down hysteresis On-state resistance(1) IOUT=15A; Tj=25C IOUT=15A; Tj=150C IOUT=15A; VCC=5V; Tj=25C VCC=-13V; IOUT=-15A; Tj=25C ICC=20 mA; IOUT1,2=0A Off state; VCC=13V; Tj=25C; VIN=VOUT=VSENSE=VCSD=0V On state; VCC=13V; VIN=5V; IOUT=0A VIN=VOUT=0V; VCC=13V; Tj=25C VIN=VOUT=0V; VCC=13V; Tj=125C 0 0 41 46 2(2) 3.5 0.01 Test conditions Min. Typ. Max. Unit 4.5 13 3.5 0.5 4 8 6 4 52 5(2) 6 3 5 27 4.5 V V V m m m m V A mA A
RON
RON REV Vclamp IS
Rdson in reverse battery condition VCC clamp voltage Supply current
IL(off)
Off-state output current(1)
1. For each channel. 2. PowerMOS leakage included.
Table 7.
Symbol td(on) td(off) (dVOUT/dt)on
Switching (VCC = 13V; Tj = 25C)
Parameter Turn-on delay time Turn-on delay time Test conditions RL=0.87 (see Figure 5.) RL=0.87 (see Figure 5.) Min. Typ. 25 35 See Figure 16. See Figure 18. 5.4 2.3 Max. Unit s s V/ s
Turn-on voltage slope RL=0.87
(dVOUT/dt)off
Turn-off voltage slope RL=0.87 Switching energy losses during twon Switching energy losses during twoff
V/ s
WON WOFF
RL=0.87 (see Figure 5.) RL=0.87 (see Figure 5.)
mJ mJ
9/34
Electrical specifications Table 8.
Symbol VIL1,2 IIL1,2 VIH1,2 IIH1,2 VI(hyst)1,2 VICL1,2 VCSDL ICSDL VCSDH ICSDH VCSD(hyst) VCSCL
VND5004A-E / VND5004ASP30-E
Logic input
Parameter Input low level voltage Low level input current Input high level voltage High level input current VIN=2.1V Input hysteresis voltage Input clamp voltage CS_DIS low level voltage Low level CS_DIS current CS_DIS high level voltage High level CS_DIS current CS_DIS hysteresis voltage CS_DIS clamp voltage ICSD=1mA ICSD=-1mA VCSD=2.1V 0.25 5.5 -0.7 7 VCSD=0.9V 1 2.1 10 IIN=1mA IIN=-1mA 0.25 5.5 -0.7 0.9 7 VIN=0.9V 1 2.1 10 Test conditions Min. Typ. Max. 0.9 Unit V A V A V V V V A V A V V V
Table 9.
Symbol IlimH
Protection and diagnostics(1)
Parameter Short circuit current Short circuit current during thermal cycling Shutdown temperature Reset temperature Thermal reset of STATUS Thermal hysteresis (TTSD-TR) Turn-off output voltage clamp IOUT=2A; VIN=0; L=6mH Test conditions VCC=13V 5VIlimL
40
TTSD TR TRS THYST VDEMAG
150 TRS+1 135
175 TRS+5
200
C C C
7 VCC-27 VCC-30 VCC-33
C V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
10/34
VND5004A-E / VND5004ASP30-E Table 10.
Symbol
Electrical specifications
Current sense (8VParameter Test conditions IOUT=15A; VSENSE=4V; VCSD=0V; Tj=-40C Tj=25C...150C IOUT=30A; VSENSE=4V; VCSD=0V; Tj=-40C Tj=25C...150C IOUT=0A; VSENSE=0V; VCSD=5V; VIN=0V; Tj=-40C to 150C VCSD=0V; VIN=5V; Tj=-40C to 150C IOUT=45A; VCSD=0V; RSENSE=3.9k Min. Typ. Max. Unit
K1
IOUT/ISENSE
11530 16000 19340 12730 16000 19270 13430 16150 17880 14500 16150 17880 0 0 5 5 400 A A V
K2
IOUT/ISENSE
ISENSE0
Analog sense current Max analog sense output voltage Analog sense output voltage in overtemperature condition Analog sense output current in overtemperature condition
VSENSE
VSENSEH
VCC=13V; RSENSE=3.9k
9
V
ISENSEH
Vcc=13V; VSENSE=5V
8
mA
Delay response time from falling tDSENSE1H edge of CS_DIS pin Delay response time from rising tDSENSE1L edge of CS_DIS pin Delay response tDSENSE2H time from rising edge of INPUT pin Delay response tDSENSE2L time from falling edge of INPUT pin
VSENSE<4V, 5A50
100
s
5
20
s
270
600
s
100
250
s
Figure 4.
INPUT CS_DIS
Current sense delay characteristics
LOAD CURRENT SENSE CURRENT tDSENSE2H tDSENSE1L tDSENSE1H tDSENSE2L
11/34
Electrical specifications Table 11. Truth table
INPUTn L H L H L H L H H L H L
VND5004A-E / VND5004ASP30-E
Conditions
OUTPUTn L H L L L L L L L H H L
SENSEn (VCSD=0V)(1) (see Figure 3.) 0 Nominal 0 VSENSEH 0 0 0 0 if Tj < TTSD VSENSEH if Tj > TTSD 0 < Nominal 0
Normal operation Overtemperature Undervoltage Short circuit to GND (Rsc 10 m) Short circuit to VCC Negative output voltage clamp
1. If VCSD is high, the SENSE output is at a high impedance. Its potential depends on leakage currents and the external circuit.
Figure 5.
Switching characteristics
VOUT tWon 80% dVOUT/dt(on) tr 10% tf t INPUT td(on) tWoff 90% dVOUT/dt(off)
td(off)
t
12/34
VND5004A-E / VND5004ASP30-E Table 12.
ISO 7637-2: 2004(E) Test pulse 1 2a 3a 3b 4 5b(2) ISO 7637-2: 2004(E) Test pulse 1 2a 3a 3b 4 5b
(2) (3)
Electrical specifications
Electrical transient requirements
Test levels(1) III -75 V +37 V -100 V +75 V -6 V +65 V IV -100 V +50 V -150 V +100 V -7 V +87 V Number of pulses or test times 5000 pulses 5000 pulses 1h 1h 1 pulse 1 pulse Test level results(1) III C C C C C C IV C C C C C C Burst cycle/pulse repetition time Delays and Impedance 2 ms, 10 50 s, 2 0.1 s, 50 0.1 s, 50 100 ms, 0.01 400 ms, 2
0.5 s 0.2 s 90 ms 90 ms
5s 5s 100 ms 100 ms
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b 2. Valid in case of external load dump clamp: 40V maximum referred to ground. 3. Suppressed load dump (pulse 5b) is withstood with a minimum load connected as specified in Table 4.: Absolute maximum ratings.
Class C E
Contents All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
13/34
Electrical specifications Figure 6. Waveforms
VND5004A-E / VND5004ASP30-E
NORMAL OPERATION INPUTn CS_DIS LOAD CURRENTn SENSE CURRENTn
VCC INPUTn CS_DIS LOAD CURRENTn SENSE CURRENTn
UNDERVOLTAGE VUSDhyst VUSD
OUTPUT SHORT TO VCC INPUTn CS_DIS LOAD VOLTAGEn LOAD CURRENTn SENSE CURRENTn OVERLOAD OPERATION Tj INPUTn CS_DIS LOAD CURRENTn SENSE CURRENTn ILIMH ILIML VSENSEH TR TTSD TRS
current power limitation limitation
thermal cycling SHORTED LOAD NORMAL LOAD
14/34
VND5004A-E / VND5004ASP30-E
Electrical specifications
2.4
Electrical characteristics curves
Figure 7.
Iloff (uA)
6 5.4 4.8 4.2 3.6 3 2.4 1.8 1.2 0.6 0 -50 -25 0 25 50 75 100 125 150 175
Off state output current
Figure 8.
Iih (uA)
5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25
High level input current
Off State Vcc= 13V Vin= Vout= 0V
Vin= 2.1V
0
25
50
75
100
125
150
175
Tc (C )
Tc (C )
Figure 9.
Vicl (V)
7 6.75
Input clamp voltage
Figure 10. Input low level
Vil (V)
2 1.8
I 1mA in=
6.5
1.6 1.4
6.25 6 5.75 5.5
1.2 1 0.8 0.6 0.4
5.25 5 -50 -25 0 25 50 75 100 125 150 175
0.2 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
Tc (C )
Figure 11. Input high level
Vih (V)
4 3.5 3
Figure 12. Input hysteresis voltage
Vihyst (V)
1 0.9 0.8 0.7
2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
Tc (C )
15/34
Electrical specifications
VND5004A-E / VND5004ASP30-E
Figure 13. On state resistance vs. Tcase
Ron (mOhm)
6 5.4 4.8 4.2
Figure 14. On state resistance vs. VCC
Ron (mOhm)
6 5.4 4.8 4.2
I out= 15A Vcc= 13V
Tc= 150C Tc= 125C
3.6 3 2.4 1.8 -50 -25 0 25 50 75 100 125 150 175
3.6 3 2.4 1.8 0 4 8 12 16 20 24 28
Tc= 25C Tc= -40C
Tc (C )
Vcc
Figure 15. Undervoltage shutdown
Vusd (V)
16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150 175
Figure 16. Turn-On voltage slope
(dVout/dt)on (V/ms)
500 450 400 350 300 250 200 150 100 50 0 -50 -25 0 25 50 75 100 125 150 175
Vcc= 13V RI 0.87Ohm =
Tc (C )
Tc (C )
Figure 17. ILIMH vs. Tcase
Ilimh (A)
150 140 130 120 110 100 90 80 70 60 50 -50 -25 0 25 50 75 100 125 150 175
Figure 18. Turn-Off voltage slope
(dVout/dt)off (V/ms)
500 450
Vcc= 13V
400 350 300 250 200 150 100 50 0 -50
Vcc= 13V RI 0.87Ohm =
-25
0
25
50
75
100
125
150
175
Tc (C )
Tc (C )
16/34
VND5004A-E / VND5004ASP30-E
Electrical specifications
Figure 19. CS_DIS high level voltage
Vcsdh (V)
4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Figure 20. CS_DIS clamp voltage
Vcsdcl (V)
8 7.5 7 6.5 6 5.5 5 4.5 4 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
Tc (C )
Figure 21. CS_DIS low level voltage
Vcsdl (V)
4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
17/34
Application information
VND5004A-E / VND5004ASP30-E
3
Application information
Figure 22. Application schematic
+5V VCC
20V Rprot CS_DIS Dld C Rprot INPUT
Rprot
CURRENT SENSE 45V
OUTPUT
RSENSE Cext
GND
3.1
MCU I/Os protection
When negative transients are present on the VCC line, the control pins will be pulled negative to approximately -1.5V. ST suggests the insertion of resistors (Rprot) in the lines to prevent the C I/Os pins from latching up. The values of these resistors provide a compromise between the leakage current of the C, the current required by the HSD I/Os (input levels compatibility) and the latch-up limit of the C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH) / IIHmax Calculation example: For VCCpeak= - 1.5V and Ilatchup 20mA; VOHC 4.5V 75 Rprot 240k . Recommended values: Rprot =10k, CEXT=10nF
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCCPK max rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
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VND5004A-E / VND5004ASP30-E
Application information
3.3
Maximum demagnetization energy (VCC = 13.5V)
Figure 23. Maximum turn off current versus inductance
100
A B
C
10
I (A) 1 1 L (mH) 10 100
A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 . In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
19/34
Package and PC board thermal data
VND5004A-E / VND5004ASP30-E
4
4.1
Package and PC board thermal data
MultiPowerSO-30 thermal data
Figure 24. MultiPowerSO-30 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m (front and back side), Copper areas: from minimum pad lay-out to 16cm2).
Figure 25. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON)
RTHj_amb(C/ W)
60 55 50 45 40 35 0 1 2 3 4 5
PCB Cu heatsink area (cm^ 2)
20/34
VND5004A-E / VND5004ASP30-E
Package and PC board thermal data
Figure 26. MultiPowerSO-30 thermal impedance junction ambient single pulse (one channel ON)
ZTH (C/ W) 1000
100
Footprint
4 cm2
10
1
0.1
0.01 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000
Figure 27. Thermal fitting model of a double channel HSD in MultiPowerSO-30 (a)
a. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
21/34
Package and PC board thermal data Equation 1: pulse calculation formula
Z TH = R TH + Z THtp ( 1 - ) where = t p T
VND5004A-E / VND5004ASP30-E
Table 13.
Thermal parameters for MultiPowerSO-30
Area/island (cm2) R1 (C/W) R2 (C/W) R3 (C/W) R4 (C/W) R5 (C/W) R6 (C/W) R7 (C/W) R8 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) C7 (W.s/C) C8 (W.s/C) Footprint 0.05 0.3 0.5 1.3 14 44.7 0.05 0.3 0.005 0.008 0.01 0.3 0.6 5 0.005 0.008 11 23.7 4
22/34
VND5004A-E / VND5004ASP30-E
Package and PC board thermal data
4.2
PQFN - 12x12 Power lead-less thermal data
Figure 28. 12x12 Power lead-less package PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 78mm x 78mm, PCB thickness=2mm, Cu thickness=35m (front and back side), Copper areas: minimum pad lay-out).
Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON)
50 45 40 35 30 25 20 0 5 10 15 20
PCB Cu heatsink area (cm^2)
23/34
Package and PC board thermal data
VND5004A-E / VND5004ASP30-E
Figure 30. PQFN - 12x12 Power lead-less package thermal impedance junction ambient single pulse (one channel ON)
100
Footprint
4 cm2
8 cm2
10
16 cm2
0,1 0,001
C/W 1
0,01
0,1
time (s)
1
10
100
1000
Figure 31. Thermal fitting model of a double channel HSD in PQFN - 12x12 Power leadless(b)
b. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
24/34
VND5004A-E / VND5004ASP30-E Equation 2: pulse calculation formula
Z TH = R TH + Z THtp ( 1 - ) where = t p T
Package and PC board thermal data
Table 14.
Thermal parameters for PQFN - 12x12 Power lead-less
Footprint 0.3 0.15 4.2 9.6 15.1 16.7 0.3 0.15 0.021 0.015 0.2 1.9 2.45 11.85 0.021 0.015 2.2 7.3 22 2.32 13.7 25 2.45 20 30 9.4 10.5 12 9.2 8.5 9 9 5.5 6 4 8 16
Area/island (cm2) R1 (C/W) R2 (C/W) R3 (C/W) R4 (C/W) R5 (C/W) R6 (C/W) R7 (C/W) R8 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) C7 (W.s/C) C8 (W.s/C)
25/34
Package and packing information
VND5004A-E / VND5004ASP30-E
5
5.1
Package and packing information
ECOPACK(R) packages
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. ECOPACK(R) packages are lead-free. The category of Second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.
5.2
MultiPowerSO-30 mechanical data
Figure 32. MultiPowerSO-30 outline
26/34
VND5004A-E / VND5004ASP30-E Table 15. MultiPowerSO-30 mechanical data
Package and packing information
Millimeters Symbol Min. A A2 A3 B C D E E1 "e" F6 F7 F8 L N S 0 Deg 0.8 1.85 0 0.42 0.23 17.1 18.85 15.9 1 14.3 5.45 0.73 1.15 10 Deg 7 Deg 16 17.2 Typ. Max. 2.35 2.25 0.1 0.58 0.32 17.3 19.15 16.1
27/34
Package and packing information
VND5004A-E / VND5004ASP30-E
5.3
PQFN - 12x12 Power lead-less mechanical data
Figure 33. PQFN - 12x12 Power lead-less outline
28/34
VND5004A-E / VND5004ASP30-E Table 16.
Package and packing information
PQFN - 12x12 Power lead-less mechanical data
Millimeters Min. A A1 b C D Dh1 Dh2 Dh3 Dh4 E Eh1 Eh2 Eh3 e1 e2 e3 f f1 L L1 L2 M N v w y y1 0.75 1.65 0.76 11.10 11.10 0.1 0.05 0.05 0.1 11.90 4.65 10.45 4.80 4.80 11.90 2.15 5.15 1.70 0.90 3.45 1.10 0.50 0.60 0.95 1.90 0.78 11.30 11.30 2 0 0.35 0.50 12.10 4.95 10.65 5 5 12.10 2.45 5.45 2 Typ. Max. 2.2 0.05 0.47
Symbol
29/34
Package and packing information
VND5004A-E / VND5004ASP30-E
5.4
MultiPowerSO-30 packing information
The devices can be packed in tube or tape and reel shipments (see the Devices summary on page 1 for packaging quantities). Figure 34. MultiPowerSO-30 tube shipment (no suffix)
Tube dimension Dimension mm
A
Base Q.ty Bulk Q.ty Tube length ( 0.5)
C
B
A B C ( 0.13)
29 435 532 3.82 23.6 0.8
Figure 35. MultiPowerSO-30 tape and reel shipment (suffix "TR")
Reel dimension Dimension Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) D (min) G (+ 2 / -0) N (min) T (max) mm 1000 1000 330 1.5 13 20.2 32 100 38.4
Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Description Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth
End
Dimension W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.1) K (max)
mm 32 4 24 1.5 2 14.2 2.2
Start Top cover tape No components 500 mm min 500 mm min Empty components pockets User direction of feed Components No components
30/34
VND5004A-E / VND5004ASP30-E
Package and packing information
5.5
PQFN - 12x12 Power lead-less packing information
The devices can be packed in tray or tape and reel shipments (see the Devices summary on page 1 for packaging quantities). Figure 36. PQFN - 12x12 Power lead-less tray shipment (no suffix)
Tray information Parameter Base Q.ty Bulk Q.ty 189 945
31/34
Package and packing information
VND5004A-E / VND5004ASP30-E
Figure 37. PQFN - 12x12 Power lead-less tape and reel shipment (suffix "TR")
Tape dimensions Dimension A0 0.1 B0 0.1 K0 0.1 F 0.1 E 0.1 W 0.3 P2 0.1 P0 0.1 P1 0.1 T 0.05 D D1 (min) Reel dimensions Dimension Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) D (min) G (+ 2 / -0) N (min) T (max) mm 1500 1500 330 1.5 13 20.2 32 100 38.4 mm 12.30 12.30 2.15 11.50 1.75 24 2 4 16 0.30 1.50 1.50
32/34
VND5004A-E / VND5004ASP30-E
Revision history
6
Revision history
Table 17.
Date 15-Sep-2003 21-Jun-2004 22-Mar-2006
Document revision history
Revision 1 2 3 Initial release. MultiPowerSO-30 package insertion. Major general update Document converted into new ST corporate template. Contents and lists of tables and figures added. Section 3.3: Maximum demagnetization energy (VCC = 13.5V) added. Section 5: Package and packing information updated Table 12: Electrical transient requirements - added note 3. Changes
02-Jul-2007
4
10-Dec-2007
5
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VND5004A-E / VND5004ASP30-E
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